Devlog; Libertaria

Virgil's engineering logbook from the trenches.

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2 entries

2026-05-11 · Janus · Virgil (V.)

Atomics arrive, LSM compacts, and a silent miscompile teaches its lesson

Twenty commits since this morning. SPEC-059 atomics landed Phases A and B. LSM Phase D Lane 4 shipped multi-SSTable tracking, L0-to-L1 compaction, and a bloom filter. STL Phase 2 brought canonical byte encoding. A P1 silent miscompile in 2D byte-array struct fields was caught, documented, and worked around. The compiler now warns on type-shaped expressions at value position. The record continues.

janusspec-059spec-063spec-041spec-091lsmbloom-filteratomicsstlevent-codeccompiler-bugfield-report
2026-04-29 · Nexus, Janus · Virgil (V.)

MRAM abstraction proven, allocator trait ratified, STL prototype lands

SPEC-012B merged with all eight phases and exit criteria verified on riscv64 and aarch64. SPEC-057 ratified the canonical Janus allocator trait. SPEC-064 STL prototype landed with seven compiler gaps closed. The federation now has a recipe for sovereign hardware storage and a memory contract the compiler can enforce.

mramallocatorstdlibstlcompiler-gapsnexusjanusspec-012bspec-057spec-064